EHB 322E: Digital Electronic Circuits

From The Emerging Circuits and Computation Group at ITU
Revision as of 14:43, 2 June 2022 by Altun (Talk | contribs)

(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search

Contents

Announcements

  • Mar. 13th The second homework has been posted that is due 05/05/2022 (before the lecture).
  • Mar. 13th The first homework has been posted that is due 31/03/2022 (before the lecture).
  • Feb. 21st The class starts at 9:30 instead of 8:30.
  • Feb. 21st The class is performed physically (not virtually) in the room 4102 (first floor), EEF.
  • Feb. 21st As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, LTspice is a good and free choice; you can download it by clicking here.

Syllabus

EHB 322E: Digital Electronic Circuits, CRN: 23071, Thursdays 8:30-11:30, Room 4102, Spring 2022.
Instructor

Mustafa Altun

  • Email: altunmus@itu.edu.tr
  • Tel: 02122856635
  • Office hours: 15:00 – 16:00 on Wednesdays in Room:3005, EEF (or stop by my office any time) or online talk
Teaching Assistant

Sadık İlik

  • Email: iliks@itu.edu.tr
Grading
  • Quizzes: 10%
    • 2 quizzes (5% each) - no prior announcement of quiz dates and times.
  • Homeworks: 10%
    • 2 homeworks (5% each)
  • Midterm Exams: 40%
    • 2 midterms (20% each) during the lecture time that will on 7/4/2022 and 12/5/2022.
  • Final Exam: 40%
Reference Books
  • Weste, N., & Harris, D. (20XX). Integrated Circuit Design: International Version: A Circuits and Systems Perspective. Pearson Education,.
  • Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (20XX). Digital integrated circuits. Englewood Cliffs: Prentice hall.
  • Uyemura, J. P. (20XX). CMOS logic circuit design. Springer.
  • Kang, S. M., & Leblebici, Y. (20XX). Cmos Digital Integrated Circuits. McGraw-Hill Education.
Policies
  • Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date.
  • Exams are in closed-notes and closed-books format.
  • To be eligible of taking the final exam, your average excluding the final exam should be at least 50% of the class average.

Weekly Course Plan

Date
Topic
Week 1, 24/2/2022 Introduction
Week 2, 3/3/2022 Switching theory & devices for digital circuits and inverters
Weeks 3, 10/3/2022 NMOS/CMOS inverters & their static and dynamic behaviors
Weeks 4, 17/3/2022 NMOS/CMOS inverters & their static and dynamic behaviors
Week 5, 24/3/2022 Optimization of multiple-stage inverters and buffers
Weeks 6, 31/3/2022 Static and complex logic gates and their area-delay-power performance analysis
Week 7, 7/4/2022 MIDTERM I
Week 8, 14/4/2022 Pass transistor logic with Shannon's expansion and performance analysis
Weeks 9, 21/4/2022 Dynamic logic gates, synchronization
Week 10, 28/4/2022 Dynamic logic gates performance analysis
Week 11, 5/5/2022 HOLIDAY, no class
Weeks 12, 12/5/2022 MIDTERM II
Weeks 13, 19/5/2022 HOLIDAY, no class
Week 14, 26/5/2022

Static and dynamic memory elements: D, SR, and JK flip-flops. Synchronization and timing analysis of digital circuits having logic and memory elements

Weeks 15, 2/6/2022 Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories

Course Materials

Homeworks & Solutions Quizzes & Solutions Midterms & Solutions
Homework 1 & Solutions Quiz 1 & Solutions Midterm 1 & Solutions
Homework 2 & Solutions Quiz 2 & Solutions Midterm 2 & Solutions
Personal tools
Namespaces

Variants
Actions
ECC
ECC (In Turkish)
Toolbox