EEF 205E: Introduction to Logic Design
From The Emerging Circuits and Computation Group at ITU
Syllabus
EEF 205E: Introduction to Logic Design, CRN: 10843, Fridays 8:30-11:30, Room: 6309 (EEF), Fall 2024.
Instructor
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Teaching Assistant
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İsmail Melik Türker
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Grading
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Textbook
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Reference Books
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Policies
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Weekly Course Plan
Date
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Topic
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Week 1, 4/10/2024 | Introduction |
Week 2, 11/10/2024 | Digital logic fundamentals: gates, combinational circuits, Boolean expressions |
Week 3, 18/10/2024 | Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares" |
Weeks 4, 25/10/2024 | Logic minimization: Karnaugh maps, Quine-McCluskey method |
Weeks 5, 1/11/2024 | Logic minimization: Karnaugh maps, Quine-McCluskey method |
Week 6, 8/11/2024 | Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.) |
Weeks 7, 15/11/2024 | MIDTERM I |
Week 8, 22/11/2024 | Combinational circuit design: implementing Boolean and arithmetic operations |
Week 9, 29/11/2024 | Area-Delay Performance analysis of combinational circuits |
Weeks 10, 6/12/2024 | Sequential circuits: latches & flip-flops |
Week 11, 13/12/2024 | Sequential circuit design: state graphs and tables, modules |
Week 12, 20/12/2024 | MIDTERM II |
Weeks 13, 27/12/2024 | Sequential circuit design: modules, state machines |
Weeks 14, 3/1/2025 | Sequential circuit design: modules, state machines |
Course Materials
Shared through Ninova.