EHB 205E

From The Emerging Circuits and Computation Group at ITU
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(Announcements)
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== Announcements ==
 
== Announcements ==
  
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Jan. 15th</span> Final letter grades have been posted.
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* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Oct. 22nd</span> Lectures are given onine using Zoom that can be accessed via [http://ninova.itu.edu.tr/tr/ Ninova].
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Dec. 17th</span> Deadline of [[Media:ehb205e-2019-fall-hw-03.pdf | '''the third homework''']] has been extended to '''27/12/2019''' before 12:30.
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* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Dec. 17th</span> [[Media:ehb205e-2019-fall-hw-04.pdf | '''The fourth homework''']] has been posted that is due '''27/12/2019''' before 12:30.
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* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Dec. 9th</span> [[Media:ehb205e-2019-fall-hw-03.pdf | '''The third homework''']] has been posted that is due '''24/12/2019''' before 12:30.
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* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Nov. 11th</span> [[Media:ehb205e-2019-fall-hw-02.pdf | '''The second homework''']] has been posted that is due '''26/11/2019''' before 12:30.
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* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Sep. 25th</span> [[Media:ehb205e-2019-fall-hw-01.pdf | '''The first homework''']] has been posted that is due '''8/10/2019''' before 12:30.
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* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Sept. 14th</span>  The class is given in the room '''4102''' (first floor), EEF.
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== Syllabus ==
 
== Syllabus ==
<div style="font-size: 120%;"> '''EHB 205E: Introduction to Logic Design''', CRN: 11101, Tuesdays 12:30-15:30, Room: 4102 (EEF), Fall 2019. </div>  
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<div style="font-size: 120%;"> '''EHB 205E: Introduction to Logic Design''', CRN: 11093, Fridays 09:30-11:30, Online using Zoom via Ninova, Fall 2020. </div>  
 
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{| border="1" cellspacing="0" cellpadding="5" " width="80%"
 
    
 
    
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         ||  
 
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* Quizzes: '''10%'''
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* Quizzes: '''20%'''
** 2 pop-up quizzes (5% each) - '''no''' prior announcement of quiz dates and times
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** 2 pop-up quizzes (10% each) - '''no''' prior announcement of quiz dates and times
  
 
* Homeworks: '''10%'''
 
* Homeworks: '''10%'''
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* Midterm Exams: '''40%'''
 
* Midterm Exams: '''40%'''
** 2 midterms (20% each) during the lecture time that will on '''22/10/2019''' and '''3/12/2019'''.
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** 2 midterms (20% each) during the lecture time that will on '''27/11/2020''' and '''8/1/2021'''.
  
* Final Exam: '''40%'''
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* Final Exam: '''30%'''
 
|-
 
|-
 
|  <div style="font-size: 120%;"> '''Textbook'''</div>
 
|  <div style="font-size: 120%;"> '''Textbook'''</div>
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* Homeworks are due at the beginning of class. Late homeworks will be downgraded by '''20%''' for each day passed the due date.
 
* Homeworks are due at the beginning of class. Late homeworks will be downgraded by '''20%''' for each day passed the due date.
 
* Exams are in '''closed-notes''' and '''closed-books''' format.
 
* Exams are in '''closed-notes''' and '''closed-books''' format.
* To be eligible of taking the final exam, you should take both midterms and your midterm average should be at least '''25''' (out of 100).
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* To be eligible of taking the final exam, your average excluding the final exam should be at least '''%50''' of the class average.
* To pass the course, you should have total of at least '''30''' (out of 100).
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|}
 
|}
  
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|| <div style="font-size: 120%;"> '''Topic'''</div>
 
|| <div style="font-size: 120%;"> '''Topic'''</div>
 
|-  
 
|-  
|  Week  1, 17/9/2019       || Introduction  
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|  Week  1, 23/10/2020       || Introduction  
 
|-  
 
|-  
|  Week  2, 24/9/2019       || Digital logic fundamentals: gates, combinational circuits, Boolean expressions  
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|  Week  2, 30/10/2020       || Digital logic fundamentals: gates, combinational circuits, Boolean expressions  
 
|-  
 
|-  
|  Week  3, 1/10/2019       || Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares"  
+
|  Week  3, 6/11/2020       || Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares"  
 
|-  
 
|-  
|  Weeks 4, 8/10/2019 || Logic minimization: Karnaugh maps, Quine-McCluskey method
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|  Weeks 4, 13/11/2020 || Logic minimization: Karnaugh maps, Quine-McCluskey method
 
|-
 
|-
|  Weeks 5, 15/10/2019   || Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.)  
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|  Weeks 5, 20/11/2020   || Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.)  
 
|-
 
|-
|  Week 6, 22/10/2019     || MIDTERM I   
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|  Week 6, 27/11/2020     || MIDTERM I   
 
|-  
 
|-  
|  Weeks 7, 29/10/2019 || HOLIDAY, no class
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|  Weeks 7, 4/12/2020 || Combinational circuit design: implementing Boolean and arithmetic operations
 
|-
 
|-
|  Week  8, 5/11/2019   || HOLIDAY, no class
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|  Week  8, 11/12/2020   || Area-Delay Performance analysis of combinational circuits
 
|-  
 
|-  
|  Week  9, 12/11/2019     || Combinational circuit design: implementing Boolean and arithmetic operations
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|  Week  9, 18/12/2020     || Sequential circuits: latches & flip-flops
 
|-  
 
|-  
|  Weeks 10, 19/11/2019 || Area-Delay Performance analysis of combinational circuits
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|  Weeks 10, 25/12/2020 || Analaysis of sequential circuits
 
|-  
 
|-  
|  Week  11, 26/11/2019     || Sequential circuits: latches & flip-flops
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|  Week  11, 1/1/2021     || HOLIDAY!
 
|-  
 
|-  
|  Week  12, 3/12/2019   || MIDTERM II
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|  Week  12, 8/1/2021   || MIDTERM II
 
|-  
 
|-  
|  Weeks 13, 10/12/2019 || Sequential circuit design: state graphs and tables, modules
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|  Weeks 13, 15/1/2021 || Sequential circuit design: state graphs and tables, modules
 
|-  
 
|-  
|  Weeks 14, 17/12/2019 || Sequential circuit design: modules, state machines
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|  Weeks 14, 22/1/2021 || Sequential circuit design: modules, state machines
|-
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|  Weeks 15, 24/12/2019 || Sequential circuit design: modules, state machines
+
 
|}
 
|}
  

Revision as of 13:18, 22 October 2020

Contents

Announcements

  • Oct. 22nd Lectures are given onine using Zoom that can be accessed via Ninova.

Syllabus

EHB 205E: Introduction to Logic Design, CRN: 11093, Fridays 09:30-11:30, Online using Zoom via Ninova, Fall 2020.
Instructor

Mustafa Altun

  • Email: altunmus@itu.edu.tr
  • Tel: 02122856635
  • Office hours: 15:00 – 16:00 on Wednesdays in Room:3005, EEF (or stop by my office any time)
Teaching Assistant

Emre Altuner

  • Email: altuner16@itu.edu.tr
  • Room: 3107 EEF
Grading
  • Quizzes: 20%
    • 2 pop-up quizzes (10% each) - no prior announcement of quiz dates and times
  • Homeworks: 10%
    • 4 homeworks (2.5% each)
  • Midterm Exams: 40%
    • 2 midterms (20% each) during the lecture time that will on 27/11/2020 and 8/1/2021.
  • Final Exam: 30%
Textbook
  • Wakerly, J. F. (20XX). Digital Design Principles & Practices. Prentice Hall.
Reference Books
  • Roth Jr, C., & Kinney, L. (20XX). Fundamentals of logic design. Cengage Learning.
  • Mano, M. M., & Kime, C. R. (20XX). Logic and Computer Design Fundamentals. Prentice Hall.
Policies
  • Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date.
  • Exams are in closed-notes and closed-books format.
  • To be eligible of taking the final exam, your average excluding the final exam should be at least %50 of the class average.

Weekly Course Plan

Date
Topic
Week 1, 23/10/2020 Introduction
Week 2, 30/10/2020 Digital logic fundamentals: gates, combinational circuits, Boolean expressions
Week 3, 6/11/2020 Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares"
Weeks 4, 13/11/2020 Logic minimization: Karnaugh maps, Quine-McCluskey method
Weeks 5, 20/11/2020 Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.)
Week 6, 27/11/2020 MIDTERM I
Weeks 7, 4/12/2020 Combinational circuit design: implementing Boolean and arithmetic operations
Week 8, 11/12/2020 Area-Delay Performance analysis of combinational circuits
Week 9, 18/12/2020 Sequential circuits: latches & flip-flops
Weeks 10, 25/12/2020 Analaysis of sequential circuits
Week 11, 1/1/2021 HOLIDAY!
Week 12, 8/1/2021 MIDTERM II
Weeks 13, 15/1/2021 Sequential circuit design: state graphs and tables, modules
Weeks 14, 22/1/2021 Sequential circuit design: modules, state machines

Course Materials

Homeworks & Solutions Homeworks & Solutions Quizzes & Solutions Sample Problems & Solutions Exams
Homework 1 & Solutions Homework 3 Quiz 1 & Solutions Problem Set 1 & Solutions Midterm 1
Homework 2 & Solutions Homework 4 Quiz 2 & Solutions Problem Set 2 & Solutions Midterm 2
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