EHB 205E
From The Emerging Circuits and Computation Group at ITU
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== Announcements == | == Announcements == | ||
− | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> | + | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Oct. 22nd</span> Lectures are given onine using Zoom that can be accessed via [http://ninova.itu.edu.tr/tr/ Ninova]. |
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== Syllabus == | == Syllabus == | ||
− | <div style="font-size: 120%;"> '''EHB 205E: Introduction to Logic Design''', CRN: | + | <div style="font-size: 120%;"> '''EHB 205E: Introduction to Logic Design''', CRN: 11093, Fridays 09:30-11:30, Online using Zoom via Ninova, Fall 2020. </div> |
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− | * Quizzes: ''' | + | * Quizzes: '''20%''' |
− | ** 2 pop-up quizzes ( | + | ** 2 pop-up quizzes (10% each) - '''no''' prior announcement of quiz dates and times |
* Homeworks: '''10%''' | * Homeworks: '''10%''' | ||
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* Midterm Exams: '''40%''' | * Midterm Exams: '''40%''' | ||
− | ** 2 midterms (20% each) during the lecture time that will on ''' | + | ** 2 midterms (20% each) during the lecture time that will on '''27/11/2020''' and '''8/1/2021'''. |
− | * Final Exam: ''' | + | * Final Exam: '''30%''' |
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| <div style="font-size: 120%;"> '''Textbook'''</div> | | <div style="font-size: 120%;"> '''Textbook'''</div> | ||
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* Homeworks are due at the beginning of class. Late homeworks will be downgraded by '''20%''' for each day passed the due date. | * Homeworks are due at the beginning of class. Late homeworks will be downgraded by '''20%''' for each day passed the due date. | ||
* Exams are in '''closed-notes''' and '''closed-books''' format. | * Exams are in '''closed-notes''' and '''closed-books''' format. | ||
− | * To be eligible of taking the final exam, | + | * To be eligible of taking the final exam, your average excluding the final exam should be at least '''%50''' of the class average. |
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|| <div style="font-size: 120%;"> '''Topic'''</div> | || <div style="font-size: 120%;"> '''Topic'''</div> | ||
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− | | Week 1, | + | | Week 1, 23/10/2020 || Introduction |
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− | | Week 2, | + | | Week 2, 30/10/2020 || Digital logic fundamentals: gates, combinational circuits, Boolean expressions |
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− | | Week 3, | + | | Week 3, 6/11/2020 || Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares" |
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− | | Weeks 4, | + | | Weeks 4, 13/11/2020 || Logic minimization: Karnaugh maps, Quine-McCluskey method |
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− | | Weeks 5, | + | | Weeks 5, 20/11/2020 || Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.) |
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− | | Week 6, | + | | Week 6, 27/11/2020 || MIDTERM I |
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− | | Weeks 7, | + | | Weeks 7, 4/12/2020 || Combinational circuit design: implementing Boolean and arithmetic operations |
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− | | Week 8, | + | | Week 8, 11/12/2020 || Area-Delay Performance analysis of combinational circuits |
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− | | Week 9, | + | | Week 9, 18/12/2020 || Sequential circuits: latches & flip-flops |
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− | | Weeks 10, | + | | Weeks 10, 25/12/2020 || Analaysis of sequential circuits |
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− | | Week 11, | + | | Week 11, 1/1/2021 || HOLIDAY! |
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− | | Week 12, | + | | Week 12, 8/1/2021 || MIDTERM II |
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− | | Weeks 13, | + | | Weeks 13, 15/1/2021 || Sequential circuit design: state graphs and tables, modules |
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− | | Weeks 14, | + | | Weeks 14, 22/1/2021 || Sequential circuit design: modules, state machines |
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Revision as of 13:18, 22 October 2020
Contents |
Announcements
- Oct. 22nd Lectures are given onine using Zoom that can be accessed via Ninova.
Syllabus
EHB 205E: Introduction to Logic Design, CRN: 11093, Fridays 09:30-11:30, Online using Zoom via Ninova, Fall 2020.
Instructor
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Teaching Assistant
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Emre Altuner
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Grading
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Textbook
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Reference Books
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Policies
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Weekly Course Plan
Date
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Topic
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Week 1, 23/10/2020 | Introduction |
Week 2, 30/10/2020 | Digital logic fundamentals: gates, combinational circuits, Boolean expressions |
Week 3, 6/11/2020 | Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares" |
Weeks 4, 13/11/2020 | Logic minimization: Karnaugh maps, Quine-McCluskey method |
Weeks 5, 20/11/2020 | Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.) |
Week 6, 27/11/2020 | MIDTERM I |
Weeks 7, 4/12/2020 | Combinational circuit design: implementing Boolean and arithmetic operations |
Week 8, 11/12/2020 | Area-Delay Performance analysis of combinational circuits |
Week 9, 18/12/2020 | Sequential circuits: latches & flip-flops |
Weeks 10, 25/12/2020 | Analaysis of sequential circuits |
Week 11, 1/1/2021 | HOLIDAY! |
Week 12, 8/1/2021 | MIDTERM II |
Weeks 13, 15/1/2021 | Sequential circuit design: state graphs and tables, modules |
Weeks 14, 22/1/2021 | Sequential circuit design: modules, state machines |
Course Materials
Homeworks & Solutions | Homeworks & Solutions | Quizzes & Solutions | Sample Problems & Solutions | Exams |
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Homework 1 & Solutions | Homework 3 | Quiz 1 & Solutions | Problem Set 1 & Solutions | Midterm 1 |
Homework 2 & Solutions | Homework 4 | Quiz 2 & Solutions | Problem Set 2 & Solutions | Midterm 2 |