EHB 322E-T
From The Emerging Circuits and Computation Group at ITU
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== Announcements == | == Announcements == | ||
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+ | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Feb. 18th</span> [[Media:ehb322e-T-2019-spring-hw-01.pdf | '''The first homework''']] has been posted that is due 07/03/2019 (before the lecture). | ||
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Feb. 1st</span> As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, '''LTspice''' is a good and free choice; you can download it by [http://www.linear.com/designtools/software/#LTspice/ '''clicking here''']. | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Feb. 1st</span> As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, '''LTspice''' is a good and free choice; you can download it by [http://www.linear.com/designtools/software/#LTspice/ '''clicking here''']. |
Revision as of 15:46, 18 February 2019
Contents |
Announcements
- Feb. 18th The first homework has been posted that is due 07/03/2019 (before the lecture).
- Feb. 1st As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, LTspice is a good and free choice; you can download it by clicking here.
Syllabus
EHB 322E: Digital Electronic Circuits, CRN: 20972, Thursdays 9:30-12:30, Room: 5302 (EEF), Spring 2019.
Instructor
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Teaching Assistant
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Sadık İlik
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Grading
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Reference Books
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Policies
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Weekly Course Plan
Date
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Topic
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Week 1, 7/2/2019 | No class |
Week 2, 14/2/2019 | Introduction |
Week 3, 21/2/2019 | Switching theory & devices for digital circuits and inverters |
Weeks 4, 28/2/2019 | NMOS/CMOS inverters & their static and dynamic behaviors |
Weeks 5, 7/3/2019 | Optimization of multiple-stage inverters and buffers |
Week 6, 14/3/2019 | Static logic gates and area-delay-power performance analysis |
Weeks 7, 21/3/2019 | MIDTERM I |
Week 8, 28/3/2019 | HOLIDAY, no class |
Week 9, 4/4/2019 | Complex logic gates and their delays |
Weeks 10, 11/4/2019 | Pass transistor logic with Shannon's expansion and performance analysis |
Week 11, 18/4/2019 | Dynamic logic gates, synchronization, and performance analysis |
Week 12, 25/4/2019 | Static and dynamic memory elements: D, SR, and JK flip-flops |
Weeks 13, 2/5/2019 | MIDTERM II |
Weeks 14, 9/5/2019 | Synchronization and timing analysis of digital circuits having logic and memory elements |
Weeks 15, 16/5/2019 | Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories |
Course Materials
Homeworks & Solutions | Quizzes & Solutions | Exams |
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