EHB 322E

From The Emerging Circuits and Computation Group at ITU
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{{DISPLAYTITLE: EHB 322E: Digital Electronic Circuits}}
 
{{DISPLAYTITLE: EHB 322E: Digital Electronic Circuits}}
 
== Syllabus ==
 
== Syllabus ==
−
<div style="font-size: 120%;"> '''EHB 322E: Digital Electronic Circuits''', CRN: 22206, Mondays 12:30-15:30, Room: 5203 EEF, Spring 2024. </div>  
+
<div style="font-size: 120%;"> '''EHB 322E: Digital Electronic Circuits''', CRN: 22187, Mondays 12:30-15:30, Room: 5203 EEF, Spring 2025. </div>  
 
{| border="1" cellspacing="0" cellpadding="5" " width="80%"
 
{| border="1" cellspacing="0" cellpadding="5" " width="80%"
 
    
 
    
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* Midterm Exams: '''40%'''
 
* Midterm Exams: '''40%'''
−
** 2 midterms (20% each) during the lecture time that will on '''25/3/2024''' and '''29/4/2024'''.
+
** 2 midterms (20% each) during the lecture time that will on '''7/4/2025''' and '''12/5/2025'''.
  
 
* Final Exam: '''40%'''
 
* Final Exam: '''40%'''
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|| <div style="font-size: 120%;"> '''Topic'''</div>
 
|| <div style="font-size: 120%;"> '''Topic'''</div>
 
|-  
 
|-  
−
|  Week  1, 12/2/2024     || Introduction  
+
|  Week  1, 17/2/2025     || Introduction  
 
|-  
 
|-  
−
|  Week  2, 19/2/2024       || Switching theory & devices for digital circuits and inverters
+
|  Week  2, 24/2/2025       || Switching theory & devices for digital circuits and inverters
 
|-  
 
|-  
−
|  Weeks 3, 26/2/2024 || NMOS/CMOS inverters & their static and dynamic behaviors
+
|  Weeks 3, 3/3/2025 || NMOS/CMOS inverters & their static and dynamic behaviors
 
|-
 
|-
−
|  Weeks 4, 4/3/2024   || NMOS/CMOS inverters & their static and dynamic behaviors
+
|  Weeks 4, 10/3/2025   || NMOS/CMOS inverters & their static and dynamic behaviors
 
|-
 
|-
−
|  Week 5, 11/3/2024     || Optimization of multiple-stage inverters and buffers  
+
|  Week 5, 17/3/2025     || Optimization of multiple-stage inverters and buffers  
 
|-  
 
|-  
−
|  Weeks 6, 18/3/2024   || Static and complex logic gates and their area-delay-power performance analysis
+
|  Weeks 6, 24/3/2025   || Static and complex logic gates and their area-delay-power performance analysis
 
|-  
 
|-  
−
|  Week 7, 25/3/2024     ||  MIDTERM I
+
|  Holiday Week, 31/3/2025     ||  HOLIDAY, no class 
 
|-  
 
|-  
−
|  Week  8, 1/4/2024   ||  Pass transistor logic with Shannon's expansion and performance analysis
+
|  Week  7, 7/4/2025   ||  MIDTERM I 
 
|-  
 
|-  
−
|  Weeks 9, 8/4/2024 || HOLIDAY, no class 
+
|  Weeks 8, 14/4/2025 || Pass transistor logic with Shannon's expansion and performance analysis
 
|-  
 
|-  
−
|  Week  10, 15/4/2024     ||  Dynamic logic gates performance analysis
+
|  Week  9, 21/4/2025     ||  Dynamic logic gates performance analysis
 
|-  
 
|-  
−
|  Week  11, 22/4/2024     ||  Dynamic logic gates, synchronization
+
|  Week  10, 28/4/2025     ||  Dynamic logic gates, synchronization
 
|-  
 
|-  
−
|  Weeks 12, 29/4/2024 ||  MIDTERM II
+
|  Weeks 11, 5/5/2025 ||  Static and dynamic memory elements: D, SR, and JK flip-flops
 
|-  
 
|-  
−
|  Weeks 13, 6/5/2024 || Static and dynamic memory elements: D, SR, and JK flip-flops
+
|  Weeks 12, 12/5/2025 || MIDTERM II
 
|-  
 
|-  
−
|  Week  14, 13/5/2024       || Synchronization and timing analysis of digital circuits having logic and memory elements  
+
|  Week  13, 19/5/2025       || Synchronization and timing analysis of digital circuits having logic and memory elements  
 
|-  
 
|-  
−
|  Weeks 15, 20/5/2024 || Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories  
+
|  Weeks 14, 26/5/2025 || Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories  
 
|}
 
|}
  

Revision as of 11:17, 17 February 2025

Syllabus

EHB 322E: Digital Electronic Circuits, CRN: 22187, Mondays 12:30-15:30, Room: 5203 EEF, Spring 2025.
Instructor

Mustafa Altun

  • Email: altunmus@itu.edu.tr
  • Tel: 02122856635
  • Office hours: 15:00 – 16:00 on Wednesdays in Room:3005, EEF (or stop by my office any time) or online talk
Teaching Assistant

Yiğit Can Erçetin

  • Email: ercetin17@itu.edu.tr
Grading
  • Quizzes: 10%
    • 2 quizzes (5% each) - no prior announcement of quiz dates and times.
  • Homeworks: 10%
    • 2 homeworks (5% each)
  • Midterm Exams: 40%
    • 2 midterms (20% each) during the lecture time that will on 7/4/2025 and 12/5/2025.
  • Final Exam: 40%
Reference Books
  • Weste, N., & Harris, D. (20XX). Integrated Circuit Design: International Version: A Circuits and Systems Perspective. Pearson Education,.
  • Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (20XX). Digital integrated circuits. Englewood Cliffs: Prentice hall.
  • Uyemura, J. P. (20XX). CMOS logic circuit design. Springer.
  • Kang, S. M., & Leblebici, Y. (20XX). Cmos Digital Integrated Circuits. McGraw-Hill Education.
Policies
  • Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date.
  • Exams are in closed-notes and closed-books format.
  • To be eligible of taking the final or the resit exam, you should take both midterms and your midterm average should be at least 25 (out of 100).
  • The final exam will be same exam for all sections.

Weekly Course Plan

Date
Topic
Week 1, 17/2/2025 Introduction
Week 2, 24/2/2025 Switching theory & devices for digital circuits and inverters
Weeks 3, 3/3/2025 NMOS/CMOS inverters & their static and dynamic behaviors
Weeks 4, 10/3/2025 NMOS/CMOS inverters & their static and dynamic behaviors
Week 5, 17/3/2025 Optimization of multiple-stage inverters and buffers
Weeks 6, 24/3/2025 Static and complex logic gates and their area-delay-power performance analysis
Holiday Week, 31/3/2025 HOLIDAY, no class
Week 7, 7/4/2025 MIDTERM I
Weeks 8, 14/4/2025 Pass transistor logic with Shannon's expansion and performance analysis
Week 9, 21/4/2025 Dynamic logic gates performance analysis
Week 10, 28/4/2025 Dynamic logic gates, synchronization
Weeks 11, 5/5/2025 Static and dynamic memory elements: D, SR, and JK flip-flops
Weeks 12, 12/5/2025 MIDTERM II
Week 13, 19/5/2025 Synchronization and timing analysis of digital circuits having logic and memory elements
Weeks 14, 26/5/2025 Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories

Course Materials

Shared through Ninova.

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