EHB 205E
From The Emerging Circuits and Computation Group at ITU
(Difference between revisions)
(→Course Materials) |
(→Announcements) |
||
Line 1: | Line 1: | ||
{{DISPLAYTITLE: EHB 205E: Introduction to Logic Design}} | {{DISPLAYTITLE: EHB 205E: Introduction to Logic Design}} | ||
== Announcements == | == Announcements == | ||
+ | |||
+ | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Nov. 3rd</span> [[Media:ehb205e-2021-fall-hw-03.pdf | '''The third homework''']] has been posted that is due '''17/12/2021''' before 9:30; submit through Ninova. | ||
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Nov. 3rd</span> [[Media:ehb205e-2021-fall-hw-02.pdf | '''The second homework''']] has been posted that is due '''19/11/2021''' before 9:30; submit through Ninova. | * <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Nov. 3rd</span> [[Media:ehb205e-2021-fall-hw-02.pdf | '''The second homework''']] has been posted that is due '''19/11/2021''' before 9:30; submit through Ninova. |
Revision as of 12:33, 3 December 2021
Contents |
Announcements
- Nov. 3rd The third homework has been posted that is due 17/12/2021 before 9:30; submit through Ninova.
- Nov. 3rd The second homework has been posted that is due 19/11/2021 before 9:30; submit through Ninova.
- Oct. 14th The first homework has been posted that is due 5/11/2021 before 9:30.
- Oct. 7th The class starts at 9:30 instead of 8:30.
- Oct. 7th The class is performed physically (not virtually).
- Oct. 7th The class is given in the room 4104 (first floor), EEF.
Syllabus
EHB 205E: Introduction to Logic Design, CRN: 11198, Fridays 8:30-11:30, Room: 4104 (EEF), Fall 2021.
Instructor
|
|
Teaching Assistant
|
Emre Altuner
|
Grading
|
|
Textbook
|
|
Reference Books
|
|
Policies
|
|
Weekly Course Plan
Date
|
Topic
|
Week 1, 8/10/2021 | Introduction |
Week 2, 15/10/2021 | Digital logic fundamentals: gates, combinational circuits, Boolean expressions |
Week 3, 22/10/2021 | Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares" |
Weeks 4, 29/10/2021 | HOLIDAY! |
Weeks 5, 5/11/2021 | Logic minimization: Karnaugh maps, Quine-McCluskey method |
Week 6, 12/11/2021 | Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.) |
Weeks 7, 19/11/2021 | MIDTERM I |
Week 8, 26/11/2021 | HOLIDAY, no class |
Week 9, 3/12/2021 | Combinational circuit design: implementing Boolean and arithmetic operations |
Weeks 10, 10/12/2021 | Area-Delay Performance analysis of combinational circuits |
Week 11, 17/12/2021 | Sequential circuits: latches & flip-flops |
Week 12, 24/12/2021 | MIDTERM II |
Weeks 13, 31/12/2021 | Sequential circuit design: state graphs and tables, modules |
Weeks 14, 7/1/2022 | Sequential circuit design: modules, state machines |
Weeks 15, 14/1/2022 | Sequential circuit design: modules, state machines |
Course Materials
Homeworks & Solutions | Homeworks & Solutions | Quizzes & Solutions | Sample Problems & Solutions | Exams |
---|---|---|---|---|
Homework 1 & Solutions | Quiz 1 & Solutions | Problem Set 1 & Solutions | ||
Homework 2 |