EHB 205E

Revision as of 13:21, 22 October 2020

EHB 205E: Introduction to Logic Design, CRN: 11093, Fridays 09:30-11:30, Online using Zoom via Ninova, Fall 2020.

Instructor	Mustafa Altun Email: altunmus@itu.edu.tr Tel: 02122856635 Office hours: 15:00 – 16:00 on Wednesdays in Room:3005, EEF (or stop by my office any time)
Teaching Assistant	Emre Altuner Email: altuner16@itu.edu.tr Room: 3107 EEF
Grading	Quizzes: 20% 2 pop-up quizzes (10% each) - no prior announcement of quiz dates and times Homeworks: 10% 4 homeworks (2.5% each) Midterm Exams: 40% 2 midterms (20% each) during the lecture time that will on 27/11/2020 and 8/1/2021. Final Exam: 30%
Textbook	Wakerly, J. F. (20XX). Digital Design Principles & Practices. Prentice Hall.
Reference Books	Roth Jr, C., & Kinney, L. (20XX). Fundamentals of logic design. Cengage Learning. Mano, M. M., & Kime, C. R. (20XX). Logic and Computer Design Fundamentals. Prentice Hall.
Policies	Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date. Exams are in closed-notes and closed-books format. To be eligible of taking the final exam, your average excluding the final exam should be at least 50% of the class average.

Date	Topic
Week 1, 23/10/2020	Introduction
Week 2, 30/10/2020	Digital logic fundamentals: gates, combinational circuits, Boolean expressions
Week 3, 6/11/2020	Digital logic fundamentals: truth tables, two-level forms (AND/OR/NAND/NOR), "don't cares"
Weeks 4, 13/11/2020	Logic minimization: Karnaugh maps, Quine-McCluskey method
Weeks 5, 20/11/2020	Combinational circuit design: building blocks (adders, multiplexers, decoders, etc.)
Week 6, 27/11/2020	MIDTERM I
Weeks 7, 4/12/2020	Combinational circuit design: implementing Boolean and arithmetic operations
Week 8, 11/12/2020	Area-Delay Performance analysis of combinational circuits
Week 9, 18/12/2020	Sequential circuits: latches & flip-flops
Weeks 10, 25/12/2020	Analaysis of sequential circuits
Week 11, 1/1/2021	HOLIDAY!
Week 12, 8/1/2021	MIDTERM II
Weeks 13, 15/1/2021	Sequential circuit design: state graphs and tables, modules
Weeks 14, 22/1/2021	Sequential circuit design: modules, state machines

Homeworks & Solutions	Homeworks & Solutions	Quizzes & Solutions	Sample Problems & Solutions	Exams
Homework 1 & Solutions	Homework 3	Quiz 1 & Solutions	Problem Set 1 & Solutions	Midterm 1
Homework 2 & Solutions	Homework 4	Quiz 2 & Solutions	Problem Set 2 & Solutions	Midterm 2

@@ Line 54: / Line 54: @@
 * Homeworks are due at the beginning of class. Late homeworks will be downgraded by '''20%''' for each day passed the due date.
 * Exams are in '''closed-notes''' and '''closed-books''' format.
-* To be eligible of taking the final exam, your average excluding the final exam should be at least '''%50''' of the class average.
+* To be eligible of taking the final exam, your average excluding the final exam should be at least '''50%''' of the class average.
 |}