EHB 322E

From The Emerging Circuits and Computation Group at ITU
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== Announcements ==
 
== Announcements ==
  
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* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Sept. 20th</span> The class is performed '''physically''' (not virtually) in the room 2106 (first floor), EEF.
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* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Feb. 28th</span> The class is given in the room 5203 (second floor), EEF.
−
* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Sept. 19th</span>  As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, '''LTspice''' is a good and free choice; you can download it by [http://www.linear.com/designtools/software/#LTspice/ '''clicking here'''].
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* <span style="background:#4682B4; color:#FFFFFF; font-size: 100%;"> Feb. 12st</span>  As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, '''LTspice''' is a good and free choice; you can download it by [http://www.linear.com/designtools/software/#LTspice/ '''clicking here'''].
  
 
== Syllabus ==
 
== Syllabus ==
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<div style="font-size: 120%;"> '''EHB 322E: Digital Electronic Circuits''', CRN: 12020, Fridays 9:30-12:30, Room: 5302 EEF, Fall 2022. </div>  
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<div style="font-size: 120%;"> '''EHB 322E: Digital Electronic Circuits''', CRN: 22206, Mondays 12:30-15:30, Room: 5203 EEF, Spring 2024. </div>  
 
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Didem Erol
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Yiğit Can Erçetin
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* Email: erold@itu.edu.tr
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* Email: ercetin17@itu.edu.tr
  
 
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|-  
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* Quizzes: '''30%'''
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* Quizzes: '''10%'''
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** 3 quizzes (10% each) - no prior announcement of quiz dates and times.
+
** 2 quizzes (5% each) - no prior announcement of quiz dates and times.
  
 
* Homeworks: '''10%'''
 
* Homeworks: '''10%'''
 
** 2 homeworks (5% each)
 
** 2 homeworks (5% each)
  
−
* Midterm Exam: '''20%'''
+
* Midterm Exams: '''40%'''
−
** 1 midterm during the lecture time that will on '''9/12/2022'''.
+
** 2 midterms (20% each) during the lecture time that will on '''25/3/2024''' and '''29/4/2024'''.
  
 
* Final Exam: '''40%'''
 
* Final Exam: '''40%'''
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* Homeworks are due at the beginning of class. Late homeworks will be downgraded by '''20%''' for each day passed the due date.
 
* Homeworks are due at the beginning of class. Late homeworks will be downgraded by '''20%''' for each day passed the due date.
 
* Exams are in '''closed-notes''' and '''closed-books''' format.
 
* Exams are in '''closed-notes''' and '''closed-books''' format.
−
* To be eligible of taking the final or the resit exam, your midterm and quiz weighted average should be at least '''25''' (out of 100).
+
* To be eligible of taking the final or the resit exam, you should take both midterms and your midterm average should be at least '''25''' (out of 100).
 +
* The final exam will be '''same''' exam for all sections.
 
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|| <div style="font-size: 120%;"> '''Topic'''</div>
 
|| <div style="font-size: 120%;"> '''Topic'''</div>
 
|-  
 
|-  
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|  Week  1, 23/9/2022     || Introduction  
+
|  Week  1, 12/2/2024     || Introduction  
 
|-  
 
|-  
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|  Week  2, 30/9/2022       || Switching theory & devices for digital circuits and inverters
+
|  Week  2, 19/2/2024       || Switching theory & devices for digital circuits and inverters
 
|-  
 
|-  
−
|  Weeks 3, 7/10/2022  || NMOS/CMOS inverters & their static and dynamic behaviors
+
|  Weeks 3, 26/2/2024 || NMOS/CMOS inverters & their static and dynamic behaviors
 
|-
 
|-
−
|  Weeks 4, 14/10/2022   || NMOS/CMOS inverters & their static and dynamic behaviors
+
|  Weeks 4, 4/3/2024   || NMOS/CMOS inverters & their static and dynamic behaviors
 
|-
 
|-
−
|  Week 5, 21/10/2022     || Optimization of multiple-stage inverters and buffers  
+
|  Week 5, 11/3/2024     || Optimization of multiple-stage inverters and buffers  
 
|-  
 
|-  
−
|  Weeks 6, 28/10/2022   || Static and complex logic gates and their area-delay-power performance analysis
+
|  Weeks 6, 18/3/2024   || Static and complex logic gates and their area-delay-power performance analysis
 
|-  
 
|-  
−
|  Week  7, 4/11/2022     ||  Static and complex logic gates and their area-delay-power performance analysis
+
|  Week  7, 25/3/2024     ||  MIDTERM I
 
|-  
 
|-  
−
|  Week  8, 11/11/2022   ||  HOLIDAY!
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|  Week  8, 1/4/2024   ||  Pass transistor logic with Shannon's expansion and performance analysis
 
|-  
 
|-  
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|  Weeks 9, 18/11/2022 ||  Pass transistor logic with Shannon's expansion and performance analysis
+
|  Weeks 9, 8/4/2024 ||  HOLIDAY, no class 
 
|-  
 
|-  
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|  Week  10, 25/11/2022     ||  Dynamic logic gates, synchronization
+
|  Week  10, 15/4/2024     ||  Dynamic logic gates performance analysis
 
|-  
 
|-  
−
|  Week  11, 2/12/2022     || Dynamic logic gates performance analysis
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|  Week  11, 22/4/2024     || Dynamic logic gates, synchronization
 
|-  
 
|-  
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|  Weeks 12, 9/12/2022 ||  MIDTERM
+
|  Weeks 12, 29/4/2024 ||  MIDTERM II
 
|-  
 
|-  
−
|  Weeks 13, 16/12/2022 || Static and dynamic memory elements: D, SR, and JK flip-flops  
+
|  Weeks 13, 6/5/2024 || Static and dynamic memory elements: D, SR, and JK flip-flops  
 
|-  
 
|-  
−
|  Week  14, 23/12/2022       || Synchronization and timing analysis of digital circuits having logic and memory elements  
+
|  Week  14, 13/5/2024       || Synchronization and timing analysis of digital circuits having logic and memory elements  
 
|-  
 
|-  
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|  Weeks 15, 30/12/2022 || Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories  
+
|  Weeks 15, 20/5/2024 || Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories  
 
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== Course Materials ==
 
== Course Materials ==
  
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Shared through Ninova.
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Latest revision as of 16:58, 28 February 2024

Contents

[edit] Announcements

  • Feb. 28th The class is given in the room 5203 (second floor), EEF.
  • Feb. 12st As a simulation tool, Spice is required for homeworks. Among different Spice-based programs, LTspice is a good and free choice; you can download it by clicking here.

[edit] Syllabus

EHB 322E: Digital Electronic Circuits, CRN: 22206, Mondays 12:30-15:30, Room: 5203 EEF, Spring 2024.
Instructor

Mustafa Altun

  • Email: altunmus@itu.edu.tr
  • Tel: 02122856635
  • Office hours: 15:00 – 16:00 on Wednesdays in Room:3005, EEF (or stop by my office any time) or online talk
Teaching Assistant

Yiğit Can Erçetin

  • Email: ercetin17@itu.edu.tr
Grading
  • Quizzes: 10%
    • 2 quizzes (5% each) - no prior announcement of quiz dates and times.
  • Homeworks: 10%
    • 2 homeworks (5% each)
  • Midterm Exams: 40%
    • 2 midterms (20% each) during the lecture time that will on 25/3/2024 and 29/4/2024.
  • Final Exam: 40%
Reference Books
  • Weste, N., & Harris, D. (20XX). Integrated Circuit Design: International Version: A Circuits and Systems Perspective. Pearson Education,.
  • Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (20XX). Digital integrated circuits. Englewood Cliffs: Prentice hall.
  • Uyemura, J. P. (20XX). CMOS logic circuit design. Springer.
  • Kang, S. M., & Leblebici, Y. (20XX). Cmos Digital Integrated Circuits. McGraw-Hill Education.
Policies
  • Homeworks are due at the beginning of class. Late homeworks will be downgraded by 20% for each day passed the due date.
  • Exams are in closed-notes and closed-books format.
  • To be eligible of taking the final or the resit exam, you should take both midterms and your midterm average should be at least 25 (out of 100).
  • The final exam will be same exam for all sections.

[edit] Weekly Course Plan

Date
Topic
Week 1, 12/2/2024 Introduction
Week 2, 19/2/2024 Switching theory & devices for digital circuits and inverters
Weeks 3, 26/2/2024 NMOS/CMOS inverters & their static and dynamic behaviors
Weeks 4, 4/3/2024 NMOS/CMOS inverters & their static and dynamic behaviors
Week 5, 11/3/2024 Optimization of multiple-stage inverters and buffers
Weeks 6, 18/3/2024 Static and complex logic gates and their area-delay-power performance analysis
Week 7, 25/3/2024 MIDTERM I
Week 8, 1/4/2024 Pass transistor logic with Shannon's expansion and performance analysis
Weeks 9, 8/4/2024 HOLIDAY, no class
Week 10, 15/4/2024 Dynamic logic gates performance analysis
Week 11, 22/4/2024 Dynamic logic gates, synchronization
Weeks 12, 29/4/2024 MIDTERM II
Weeks 13, 6/5/2024 Static and dynamic memory elements: D, SR, and JK flip-flops
Week 14, 13/5/2024 Synchronization and timing analysis of digital circuits having logic and memory elements
Weeks 15, 20/5/2024 Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories

[edit] Course Materials

Shared through Ninova.

Retrieved from "https://www.ecc.itu.edu.tr/index.php?title=EHB_322E&oldid=4556"
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