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| <span class="plainlinks">[http://mriedel.ece.umn.edu/wiki/images/f/fe/Altun_Riedel_Neuhauser_Nanoscale_Digital_Computation_Through_Percolation.ppt http://cctbio.ece.umn.edu/wiki/images/3/36/Ppt.jpg]</span> | | <span class="plainlinks">[http://mriedel.ece.umn.edu/wiki/images/f/fe/Altun_Riedel_Neuhauser_Nanoscale_Digital_Computation_Through_Percolation.ppt http://cctbio.ece.umn.edu/wiki/images/3/36/Ppt.jpg]</span> |
| <br> [http://mriedel.ece.umn.edu/wiki/images/f/fe/Altun_Riedel_Neuhauser_Nanoscale_Digital_Computation_Through_Percolation.ppt Slides] | | <br> [http://mriedel.ece.umn.edu/wiki/images/f/fe/Altun_Riedel_Neuhauser_Nanoscale_Digital_Computation_Through_Percolation.ppt Slides] |
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− | {|
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− | {| style="background:#F0E68C"
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− | |- valign="top"
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− | | width="100" | '''title''':
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− | | width="500" | [[Media:Altun_Logic_Synthesis_for_Networks_of_Four_Terminal_Switches.pdf | Logic Synthesis for Networks of Four-Terminal Switches]]
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− | | '''author''':
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− | | [[Mustafa Altun]]
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− | |- valign="top"
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− | | '''dissertation''':
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− | | Ph.D., [http://www.ece.umn.edu Electrical Engineering], [http://www.umn.edu University of Minnesota], 2012.
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− | |}
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− | | align=center width="70" |
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− | <span class="plainlinks">
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− | [http://www.mriedel.ece.umn.edu/wiki/images/9/92/Altun_Logic_Synthesis_for_Networks_of_Four_Terminal_Switches.pdf http://cctbio.ece.umn.edu/wiki/images/0/04/Pdf.jpg]</span>
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− | <br>
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− | [[Media:Altun_Logic_Synthesis_for_Networks_of_Four_Terminal_Switches.pdf | PhD Dissertation]]
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− | | align=center width="70" |
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− | <span class="plainlinks">[http://www.mriedel.ece.umn.edu/wiki/images/9/97/Altun_Logic_Synthesis_for_Networks_of_Four_Terminal_Switches.ppt http://cctbio.ece.umn.edu/wiki/images/3/36/Ppt.jpg]</span>
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− | <br> [http://www.mriedel.ece.umn.edu/wiki/images/9/97/Altun_Logic_Synthesis_for_Networks_of_Four_Terminal_Switches.ppt Slides]
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| |} | | |} |