EEF 262E

From The Emerging Circuits and Computation Group at ITU
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(Syllabus)
(Weekly Course Plan)
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|| <div style="font-size: 120%;"> '''Topic'''</div>
 
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|  Week  1, 12/2/2024 & 13/2/2024    || Introduction
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|  Week  1, 12/2/2024 & 13/2/2024    || No class
 
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|  Week  2, 19/2/2024      || Switching theory & devices for digital circuits and inverters
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|  Week  2, 19/2/2024 &       || No class
 
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|-  
|  Weeks 3, 26/2/2024 || NMOS/CMOS inverters & their static and dynamic behaviors
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|  Weeks 3, 26/2/2024 & || Fundamentals of solid-state physics, properties of semiconductors, energy bands, direct and indirect semiconductors, Current carriers, drift and diffusion mechanisms.
 
|-
 
|-
|  Weeks 4, 4/3/2024   || NMOS/CMOS inverters & their static and dynamic behaviors
+
|  Weeks 4, 4/3/2024 || NMOS/CMOS inverters & their static and dynamic behaviors
 
|-
 
|-
|  Week 5, 11/3/2024     || Optimization of multiple-stage inverters and buffers  
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|  Week 5, 11/3/2024 &    || Optimization of multiple-stage inverters and buffers  
 
|-  
 
|-  
|  Weeks 6, 18/3/2024   || Static and complex logic gates and their area-delay-power performance analysis
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|  Weeks 6, 18/3/2024 || Static and complex logic gates and their area-delay-power performance analysis
 
|-  
 
|-  
|  Week  7, 25/3/2024     ||  MIDTERM I  
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|  Week  7, 25/3/2024 &    ||  MIDTERM I  
 
|-  
 
|-  
|  Week  8, 1/4/2024   ||  Pass transistor logic with Shannon's expansion and performance analysis
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|  Week  8, 1/4/2024 ||  Pass transistor logic with Shannon's expansion and performance analysis
 
|-  
 
|-  
|  Weeks 9, 8/4/2024 ||  HOLIDAY, no class   
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|  Weeks 9, 8/4/2024 & ||  HOLIDAY, no class   
 
|-  
 
|-  
|  Week  10, 15/4/2024     ||  Dynamic logic gates performance analysis
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|  Week  10, 15/4/2024 &    ||  Dynamic logic gates performance analysis
 
|-  
 
|-  
|  Week  11, 22/4/2024     ||  Dynamic logic gates, synchronization
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|  Week  11, 22/4/2024 &    ||  Dynamic logic gates, synchronization
 
|-  
 
|-  
|  Weeks 12, 29/4/2024 ||  MIDTERM II
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|  Weeks 12, 29/4/2024 & ||  MIDTERM II
 
|-  
 
|-  
|  Weeks 13, 6/5/2024 || Static and dynamic memory elements: D, SR, and JK flip-flops  
+
|  Weeks 13, 6/5/2024 & || Static and dynamic memory elements: D, SR, and JK flip-flops  
 
|-  
 
|-  
|  Week  14, 13/5/2024       || Synchronization and timing analysis of digital circuits having logic and memory elements  
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|  Week  14, 13/5/2024 &    || Synchronization and timing analysis of digital circuits having logic and memory elements  
 
|-  
 
|-  
|  Weeks 15, 20/5/2024 || Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories  
+
|  Weeks 15, 20/5/2024 & || Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories  
 
|}
 
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Revision as of 13:51, 28 February 2024

Syllabus

EEF 262E: Fundamentals of Electronics, CRN: 25175, Mondays 8:30-11:30 & Tuesdays 8:30-11:30, Room: 5304 EEF, Spring 2024.
Instructors

Mustafa Altun

  • Email: altunmus@itu.edu.tr

Tufan Karalar

  • Email: karalart@itu.edu.tr
Grading
  • Midterm Exams: 60%
    • 2 midterms (30% each) during the lecture time that will on 25/3/2024 and 29/4/2024.
  • Final Exam: 40%
Reference Books
  • Weste, N., & Harris, D. (20XX). Integrated Circuit Design: International Version: A Circuits and Systems Perspective. Pearson Education,.
  • Rabaey, J. M., Chandrakasan, A. P., & Nikolic, B. (20XX). Digital integrated circuits. Englewood Cliffs: Prentice hall.
  • Uyemura, J. P. (20XX). CMOS logic circuit design. Springer.
  • Kang, S. M., & Leblebici, Y. (20XX). Cmos Digital Integrated Circuits. McGraw-Hill Education.
Policies
  • Exams are in closed-notes and closed-books format.
  • To be eligible of taking the final or the resit exam, you should take both midterms and your midterm average should be at least 25 (out of 100).
  • The final exam will be same exam for all sections.

Weekly Course Plan

Date
Topic
Week 1, 12/2/2024 & 13/2/2024 No class
Week 2, 19/2/2024 & No class
Weeks 3, 26/2/2024 & Fundamentals of solid-state physics, properties of semiconductors, energy bands, direct and indirect semiconductors, Current carriers, drift and diffusion mechanisms.
Weeks 4, 4/3/2024 & NMOS/CMOS inverters & their static and dynamic behaviors
Week 5, 11/3/2024 & Optimization of multiple-stage inverters and buffers
Weeks 6, 18/3/2024 & Static and complex logic gates and their area-delay-power performance analysis
Week 7, 25/3/2024 & MIDTERM I
Week 8, 1/4/2024 & Pass transistor logic with Shannon's expansion and performance analysis
Weeks 9, 8/4/2024 & HOLIDAY, no class
Week 10, 15/4/2024 & Dynamic logic gates performance analysis
Week 11, 22/4/2024 & Dynamic logic gates, synchronization
Weeks 12, 29/4/2024 & MIDTERM II
Weeks 13, 6/5/2024 & Static and dynamic memory elements: D, SR, and JK flip-flops
Week 14, 13/5/2024 & Synchronization and timing analysis of digital circuits having logic and memory elements
Weeks 15, 20/5/2024 & Semiconductor memories and gate arrays: RAM's, ROM's, and flash memories

Course Materials

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