Research - Revision history

Altun at 19:18, 17 April 2023

2023-04-17T19:18:12Z

Altun at 19:13, 17 April 2023

2023-04-17T19:13:18Z

Altun at 08:03, 26 October 2021

2021-10-26T08:03:22Z

Altun at 08:02, 26 October 2021

2021-10-26T08:02:48Z

Altun at 08:01, 26 October 2021

2021-10-26T08:01:00Z

Altun at 07:28, 4 June 2021

2021-06-04T07:28:34Z

Altun at 08:00, 5 February 2021

2021-02-05T08:00:12Z

Altun at 11:02, 21 October 2020

2020-10-21T11:02:15Z

Altun at 10:57, 21 October 2020

2020-10-21T10:57:50Z

Altun at 14:53, 20 October 2020

2020-10-20T14:53:24Z

@@ Line 139: / Line 139: @@
 |- valign="top"
 | '''duration''':
-| 2019-2022
+| 2019-2023, ''completed''
 |}
 {| style="margin-left: auto; margin-right: 0px; border:0.1px solid #abd5ff; background:#f1f5fc; padding:0.2em 0em;"
@@ Line 233: / Line 233: @@
 |- valign="top"
 | '''duration''':
-| 2020-2023
+| 2020-2023, ''completed''
 |}
 {| style="margin-left: auto; margin-right: 0px; border:0.1px solid #abd5ff; background:#f1f5fc; padding:0.2em 0em;"
@@ Line 254: / Line 254: @@
 |- valign="top"
 | '''duration''':
-| 2017-2019
+| 2017-2019, ''completed''
 |}

@@ Line 64: / Line 64: @@
 |- valign="top"
 | '''appeared&nbsp;in''':
-| width="450" | [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6245516 IEEE Transactions on Emerging Topics in Computing], early access, 2020.
+| width="450" | [http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6245516 IEEE Transactions on Emerging Topics in Computing], Vol. 10, Issue 1, pp. 351&ndash;360, 2022.
 |- valign=top
 | '''presented&nbsp;at''':

@@ Line 595: / Line 595: @@
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/d/d6/Vahapoglu_Altun_Accurate_Synthesis_of_Arithmetic_Operations_with_Stochastic_Logic.pptx]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/d/d6/Vahapoglu_Altun_Accurate_Synthesis_of_Arithmetic_Operations_with_Stochastic_Logic.pptx]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/d/d6/Vahapoglu_Altun_Accurate_Synthesis_of_Arithmetic_Operations_with_Stochastic_Logic.pptx Poster]
+<br> [https://www.ecc.itu.edu.tr/images/d/d6/Vahapoglu_Altun_Accurate_Synthesis_of_Arithmetic_Operations_with_Stochastic_Logic.pptx Poster]
 |}
 |}

@@ Line 431: / Line 431: @@
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/f/f9/Tunali_Altun_Defect_Tolerance_in_Diode_FET_and_Four-Terminal_Switch_based_Nano-Crossbar_Arrays.pptx]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/f/f9/Tunali_Altun_Defect_Tolerance_in_Diode_FET_and_Four-Terminal_Switch_based_Nano-Crossbar_Arrays.pptx]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/f/f9/Tunali_Altun_Defect_Tolerance_in_Diode_FET_and_Four-Terminal_Switch_based_Nano-Crossbar_Arrays.pptx Slides]
+<br> [https://www.ecc.itu.edu.tr/images/f/f9/Tunali_Altun_Defect_Tolerance_in_Diode_FET_and_Four-Terminal_Switch_based_Nano-Crossbar_Arrays.pptx Slides]
 |}
 <!--
@@ Line 461: / Line 461: @@
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/2/28/Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.ppt]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/2/28/Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.ppt]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/2/28/Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.ppt Slides]
+<br> [https://www.ecc.itu.edu.tr/images/2/28/Altun_Riedel_Lattice-Based_Computation_of_Boolean_Functions.ppt Slides]
 |}
 -->
@@ Line 711: / Line 711: @@
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/7/7f/Nojehdeh_Aksoy_Altun_Approximate_ANN.pptx]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/7/7f/Nojehdeh_Aksoy_Altun_Approximate_ANN.pptx]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/7/7f/Nojehdeh_Aksoy_Altun_Approximate_ANN.pptx Slides]
+<br> [https://www.ecc.itu.edu.tr/images/7/7f/Nojehdeh_Aksoy_Altun_Approximate_ANN.pptx Slides]
 |}
 {| style="border:1px solid #abd5f5; background:#f1f5fc;"
@@ Line 740: / Line 740: @@
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/8/86/Ayhan_Kula_Altun_Approximate_System_Design_Methodology.pptx]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/8/86/Ayhan_Kula_Altun_Approximate_System_Design_Methodology.pptx]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/8/86/Ayhan_Kula_Altun_Approximate_System_Design_Methodology.pptx Slides]
+<br> [https://www.ecc.itu.edu.tr/images/8/86/Ayhan_Kula_Altun_Approximate_System_Design_Methodology.pptx Slides]
 |}
@@ Line 911: / Line 911: @@
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/d/d0/Susam_Altun_An_Efficient_Algorithm_to_Synthesize_Quantum_Circuits_and_Optimization.pptx]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/d/d0/Susam_Altun_An_Efficient_Algorithm_to_Synthesize_Quantum_Circuits_and_Optimization.pptx]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/d/d0/Susam_Altun_An_Efficient_Algorithm_to_Synthesize_Quantum_Circuits_and_Optimization.pptx Slides]
+<br> [https://www.ecc.itu.edu.tr/images/d/d0/Susam_Altun_An_Efficient_Algorithm_to_Synthesize_Quantum_Circuits_and_Optimization.pptx Slides]
 |}
 -->
@@ Line 1,043: / Line 1,043: @@
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/a/a7/Comert_Altun_Nadar_Erturk_Warranty_Forecasting_of_Electronic_Boards_using_Short-term_Field_Data.pptx]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/a/a7/Comert_Altun_Nadar_Erturk_Warranty_Forecasting_of_Electronic_Boards_using_Short-term_Field_Data.pptx]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/a/a7/Comert_Altun_Nadar_Erturk_Warranty_Forecasting_of_Electronic_Boards_using_Short-term_Field_Data.pptx Slides]
+<br> [https://www.ecc.itu.edu.tr/images/a/a7/Comert_Altun_Nadar_Erturk_Warranty_Forecasting_of_Electronic_Boards_using_Short-term_Field_Data.pptx Slides]
 |}
@@ Line 1,072: / Line 1,072: @@
 | align="center" width="70" |
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/d/de/Yadavari_EtAl_Effects_of_ZnO_Varistor_Degradation_on_the_Overvoltage_Protection_Mechanism_of_Electronic_Boards.pptx]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/d/de/Yadavari_EtAl_Effects_of_ZnO_Varistor_Degradation_on_the_Overvoltage_Protection_Mechanism_of_Electronic_Boards.pptx]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/d/de/Yadavari_EtAl_Effects_of_ZnO_Varistor_Degradation_on_the_Overvoltage_Protection_Mechanism_of_Electronic_Boards.pptx Slides]
+<br> [https://www.ecc.itu.edu.tr/images/d/de/Yadavari_EtAl_Effects_of_ZnO_Varistor_Degradation_on_the_Overvoltage_Protection_Mechanism_of_Electronic_Boards.pptx Slides]
 |}
 <!--
@@ Line 1,099: / Line 1,099: @@
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/a/a8/Sal_Altun_Extensive_Investigation_of_CALT_in_Comparison_with_ALT.pptx]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/a/a8/Sal_Altun_Extensive_Investigation_of_CALT_in_Comparison_with_ALT.pptx]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/a/a8/Sal_Altun_Extensive_Investigation_of_CALT_in_Comparison_with_ALT.pptx Slides]
+<br> [https://www.ecc.itu.edu.tr/images/a/a8/Sal_Altun_Extensive_Investigation_of_CALT_in_Comparison_with_ALT.pptx Slides]
 |} -->
 |}
@@ Line 1,210: / Line 1,210: @@
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/7/77/Altun_Kuntman_A_Wideband_CMOS_Current-Mode_Operational_Amplifier_and_Its_Use_for_Band-Pass_Filter_Realization.ppt]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/7/77/Altun_Kuntman_A_Wideband_CMOS_Current-Mode_Operational_Amplifier_and_Its_Use_for_Band-Pass_Filter_Realization.ppt]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/7/77/Altun_Kuntman_A_Wideband_CMOS_Current-Mode_Operational_Amplifier_and_Its_Use_for_Band-Pass_Filter_Realization.ppt Slides]
+<br> [https://www.ecc.itu.edu.tr/images/7/77/Altun_Kuntman_A_Wideband_CMOS_Current-Mode_Operational_Amplifier_and_Its_Use_for_Band-Pass_Filter_Realization.ppt Slides]
 |}
@@ Line 1,270: / Line 1,270: @@
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/1/18/Altun_Riedel_A_Study_on_Monotone_Self_Dual_Boolean_Functions.ppt]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/1/18/Altun_Riedel_A_Study_on_Monotone_Self_Dual_Boolean_Functions.ppt]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/1/18/Altun_Riedel_A_Study_on_Monotone_Self_Dual_Boolean_Functions.ppt Slides]
+<br> [https://www.ecc.itu.edu.tr/images/1/18/Altun_Riedel_A_Study_on_Monotone_Self_Dual_Boolean_Functions.ppt Slides]
 |}

@@ Line 78: / Line 78: @@
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/1/1c/Cevik_Aksoy_Altun_CMOS_Implementation_of_Switching_Lattices.pptx]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/1/1c/Cevik_Aksoy_Altun_CMOS_Implementation_of_Switching_Lattices.pptx]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/1/1c/Cevik_Aksoy_Altun_CMOS_Implementation_of_Switching_Lattices.pptx Slides]
+<br> [https://www.ecc.itu.edu.tr/images/1/1c/Cevik_Aksoy_Altun_CMOS_Implementation_of_Switching_Lattices.pptx Slides]
 |}
@@ Line 107: / Line 107: @@
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/5/54/Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pptx]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/5/54/Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pptx]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/5/54/Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pptx Slides]
+<br> [https://www.ecc.itu.edu.tr/images/5/54/Aksoy_Altun_SAT_based_Synthesis_of_Switching_Lattices.pptx Slides]
 |}
@@ Line 199: / Line 199: @@
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/3/3a/Aksoy_Parvin_Nojehdeh_Altun_Time_Multiplexed_ANN_Implementation.pptx]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/3/3a/Aksoy_Parvin_Nojehdeh_Altun_Time_Multiplexed_ANN_Implementation.pptx]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/3/3a/Aksoy_Parvin_Nojehdeh_Altun_Time_Multiplexed_ANN_Implementation.pptx Slides]
+<br> [https://www.ecc.itu.edu.tr/images/3/3a/Aksoy_Parvin_Nojehdeh_Altun_Time_Multiplexed_ANN_Implementation.pptx Slides]
 |}
 |}
@@ Line 342: / Line 342: @@
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/7/71/Safaltin_EtAl_Technology_Development_for_Switching_Lattices.pptx]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/7/71/Safaltin_EtAl_Technology_Development_for_Switching_Lattices.pptx]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/7/71/Safaltin_EtAl_Technology_Development_for_Switching_Lattices.pptx Slides]
+<br> [https://www.ecc.itu.edu.tr/images/7/71/Safaltin_EtAl_Technology_Development_for_Switching_Lattices.pptx Slides]
 |}
@@ Line 371: / Line 371: @@
 <span class="plainlinks">
-[[File:PPT.jpg|60px|link=http://www.ecc.itu.edu.tr/images/b/b8/Tunali_Altun_Logic_Synthesis_and_Defect_Tolerance_for_Memristive_Crossbars.pptx]]
+[[File:PPT.jpg|60px|link=https://www.ecc.itu.edu.tr/images/b/b8/Tunali_Altun_Logic_Synthesis_and_Defect_Tolerance_for_Memristive_Crossbars.pptx]]
 </span>
-<br> [http://www.ecc.itu.edu.tr/images/b/b8/Tunali_Altun_Logic_Synthesis_and_Defect_Tolerance_for_Memristive_Crossbars.pptx Slides]
+<br> [https://www.ecc.itu.edu.tr/images/b/b8/Tunali_Altun_Logic_Synthesis_and_Defect_Tolerance_for_Memristive_Crossbars.pptx Slides]
 |}
@@ Line 402: / Line 402: @@
 <span class="plainlinks">
-[[File:PDF.png|65px|link=http://www.ecc.itu.edu.tr/images/7/7f/Altun_EtAl_Synthesis_and_Performance_Optimization_of_a_Switching_Nano-crossbar_Computer_SLIDES.pdf]]
+[[File:PDF.png|65px|link=https://www.ecc.itu.edu.tr/images/7/7f/Altun_EtAl_Synthesis_and_Performance_Optimization_of_a_Switching_Nano-crossbar_Computer_SLIDES.pdf]]
 </span>
 <br> [[Media:Altun_EtAl_Synthesis_and_Performance_Optimization_of_a_Switching_Nano-crossbar_Computer_SLIDES.pdf | Slides]]

@@ Line 585: / Line 585: @@
 |- valign=top
 | '''presented&nbsp;at''':
-| width="450"| [http://www.isvlsi.org/ IEEE Computer Society Annual Symposium on VLSI (ISVLSI)], Pittsburgh, USA, 2016.
+| width="450"| [http://www.eng.ucy.ac.cy/theocharides/isvlsi16/ IEEE Computer Society Annual Symposium on VLSI (ISVLSI)], Pittsburgh, USA, 2016.
 |}
 | align=center width="70" |
@@ Line 701: / Line 701: @@
 |- valign=top
 | '''presented&nbsp;at''':
-| width="450"| [http://www.isvlsi.org/ IEEE Computer Society Annual Symposium on VLSI (ISVLSI)], Limassol, Cyprus, 2020.
+| width="450"| [http://www.eng.ucy.ac.cy/theocharides/isvlsi20/ IEEE Computer Society Annual Symposium on VLSI (ISVLSI)], Limassol, Cyprus, 2020.
 |}
 | align=center width="70" |
@@ Line 729: / Line 729: @@
 |- valign=top
 | '''presented&nbsp;at''':
-| width="450"| [http://www.isvlsi.org/ IEEE Computer Society Annual Symposium on VLSI (ISVLSI)], Bochum, Germany, 2017.
+| width="450"| [http://www.eng.ucy.ac.cy/theocharides/isvlsi17/ IEEE Computer Society Annual Symposium on VLSI (ISVLSI)], Bochum, Germany, 2017.
 |}

@@ Line 7: / Line 7: @@
 {| id=portal cellspacing="0" cellpadding="0" width=100% style="border:1px solid #B8C7D9; padding:0px;"
 |-
-| colspan="2" style="background:#8FBCCF; text-align:center; padding:1px; border-bottom:1px #8FBCCF solid;" |
+| colspan="2" style="background:#8FBCBF; text-align:center; padding:1px; border-bottom:1px #8FBCBF solid;" |
 <h2 style="margin:.1em; border-bottom:1px; font-size:140%; font-weight:bold;"> Computing with Switching Lattices </h2>
@@ Line 156: / Line 156: @@
 {| id=portal cellspacing="0" cellpadding="0" width=100% style="border:1px solid #B8C7D9; padding:0px;"
 |-
-| colspan="2" style="background:#8FBC8F; text-align:center; padding:1px; border-bottom:1px #8FBC8F solid;" |
+| colspan="2" style="background:#8FBCAF; text-align:center; padding:1px; border-bottom:1px #8FBCAF solid;" |
 <h2 style="margin:.1em; border-bottom:1px; font-size:140%; font-weight:bold;"> Energy Efficient ANN Hardware Implementation </h2>
 |-
@@ Line 265: / Line 265: @@
 {| id=portal cellspacing="0" cellpadding="0" width=100% style="border:1px solid #B8C7D9; padding:0px;"
 |-
-| colspan="2" style="background:#8FBCBF; text-align:center; padding:1px; border-bottom:1px #8FBCBF solid;" |
+| colspan="2" style="background:#8FBC9F; text-align:center; padding:1px; border-bottom:1px #8FBC9F solid;" |
 <h2 style="margin:.1em; border-bottom:1px; font-size:140%; font-weight:bold;"> Computing with Nano-Crossbar Arrays </h2>

@@ Line 156: / Line 156: @@
 {| id=portal cellspacing="0" cellpadding="0" width=100% style="border:1px solid #B8C7D9; padding:0px;"
 |-
-| colspan="2" style="background:#8FBCAF; text-align:center; padding:1px; border-bottom:1px #8FBCAF solid;" |
+| colspan="2" style="background:#8FBC8F; text-align:center; padding:1px; border-bottom:1px #8FBC8F solid;" |
 <h2 style="margin:.1em; border-bottom:1px; font-size:140%; font-weight:bold;"> Energy Efficient ANN Hardware Implementation </h2>
 |-
@@ Line 265: / Line 265: @@
 {| id=portal cellspacing="0" cellpadding="0" width=100% style="border:1px solid #B8C7D9; padding:0px;"
 |-
-| colspan="2" style="background:#8FBCCF; text-align:center; padding:1px; border-bottom:1px #8FBCCF solid;" |
+| colspan="2" style="background:#8FBCBF; text-align:center; padding:1px; border-bottom:1px #8FBCBF solid;" |
 <h2 style="margin:.1em; border-bottom:1px; font-size:140%; font-weight:bold;"> Computing with Nano-Crossbar Arrays </h2>
@@ Line 537: / Line 537: @@
 {| id=portal cellspacing="0" cellpadding="0" width=100% style="border:1px solid #B8C7D9; padding:0px;"
 |-
-| colspan="2" style="background:#8FBCAF; text-align:center; padding:1px; border-bottom:1px #8FBCAF solid;" |
+| colspan="2" style="background:#8FBC8F; text-align:center; padding:1px; border-bottom:1px #8FBC8F solid;" |
 <h2 style="margin:.1em; border-bottom:1px; font-size:140%; font-weight:bold;"> Stochastic and Bit Stream Computing </h2>
 |-
@@ Line 663: / Line 663: @@
 {| id=portal cellspacing="0" cellpadding="0" width=100% style="border:1px solid #B8C7D9; padding:0px;"
 |-
-| colspan="2" style="background:#8FBC9F; text-align:center; padding:1px; border-bottom:1px #8FBCAF solid;" |
+| colspan="2" style="background:#8FBC7F; text-align:center; padding:1px; border-bottom:1px #8FBC7F solid;" |
 <h2 style="margin:.1em; border-bottom:1px; font-size:140%; font-weight:bold;"> Approximate Circuit and System Design </h2>
 |-
@@ Line 791: / Line 791: @@
 {| id=portal cellspacing="0" cellpadding="0" width=100% style="border:1px solid #B8C7D9; padding:0px;"
 |-
-| colspan="2" style="background:#8FBCBF; text-align:center; padding:1px; border-bottom:1px #8FBCBF solid;" |
+| colspan="2" style="background:#8FBC6F; text-align:center; padding:1px; border-bottom:1px #8FBC6F solid;" |
 <h2 style="margin:.1em; border-bottom:1px; font-size:140%; font-weight:bold;"> Reversible Computing </h2>
 |-
@@ Line 980: / Line 980: @@
 {| id=portal cellspacing="0" cellpadding="0" width=100% style="border:1px solid #B8C7D9; padding:0px;"
 |-
-| colspan="2" style="background:#8FBC8F; text-align:center; padding:1px; border-bottom:1px #8FBC9F solid;" |
+| colspan="2" style="background:#8FBC5F; text-align:center; padding:1px; border-bottom:1px #8FBC5F solid;" |
 <h2 style="margin:.1em; border-bottom:1px; font-size:140%; font-weight:bold;"> Reliability of Electronic Products </h2>
 |-
@@ Line 1,164: / Line 1,164: @@
 {| id=portal cellspacing="0" cellpadding="0" width=100% style="border:1px solid #B8C7D9; padding:0px;"
 |-
-| colspan="2" style="background:#8FBC7F; text-align:center; padding:1px; border-bottom:1px #8FBC8F solid;" |
+| colspan="2" style="background:#8FBC4F; text-align:center; padding:1px; border-bottom:1px #8FBC4F solid;" |
 <h2 style="margin:.1em; border-bottom:1px; font-size:140%; font-weight:bold;"> Analog Circuit Design </h2>
 |-
@@ Line 1,227: / Line 1,227: @@
 {| id=portal cellspacing="0" cellpadding="0" width=100% style="border:1px solid #B8C7D9; padding:0px;"
 |-
-| colspan="2" style="background:#8FBC6F; text-align:center; padding:1px; border-bottom:1px #8FBC7F solid;" |
+| colspan="2" style="background:#8FBC3F; text-align:center; padding:1px; border-bottom:1px #8FBC3F solid;" |
 <h2 style="margin:.1em; border-bottom:1px; font-size:140%; font-weight:bold;"> Discrete Mathematics </h2>
 |-

← Older revision		Revision as of 14:53, 20 October 2020
Line 164:		Line 164:

	[[Image:research_ANN.png\|center\|none\|800px\|link=]]		[[Image:research_ANN.png\|center\|none\|800px\|link=]]
		+

	<!-- YAYIN -->		<!-- YAYIN -->